SN74HC541DWR Integrated Circuit Chip linear digital integrated circuit

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SN54HC541, SN74HC541

OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS

* Wide Operating Voltage Range of 2 V to 6 V

* High-Current 3-State Outputs Drive Bus

  Lines Directly or Up To 15 LSTTL Loads

* Low Power Consumption, 80-µA Max I_CC

* Typical t_pd = 10 ns

* ±6-mA Output Drive at 5 V

* Low Input Current of 1 µA Max

* Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs)

description

These octal buffers and line drivers feature the performance of the ’HC240 devices and a pinout with inputs and outputs on opposite sides of the package. This arrangement greatly facilitates printed circuit board layout.

The 3-state outputs are controlled by a two-input NOR gate. If either output-enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state. The ’HC541 devices provide true data at the outputs.

absolute maximum ratings over operating free-air temperature range

(unless otherwise noted)†

Supply voltage range, V_CC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V

Input clamp current, I_IK (V_I < 0 or V_I > V_CC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA

Output clamp current, I_OK (V_O < 0 or V_O > V_CC) (see Note 1)  . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA

Continuous output current, I_O (V_O = 0 to V_CC)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA

Continuous current through V_CC or GND  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA

Package thermal impedance, θ_JA (see Note 2): DB package  . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W

                                                                          DW package  . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W

                                                                          N package  . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W

                                                                          NS package  . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W

                                                                          PW package  . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C

†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

logic diagram (positive logic)